PILEDS
Control planning

DMX pixel controller capacity calculator

Translate a physical RGB or RGBW pixel count into data slots, universes, output ports, and controllers—while keeping the hardware assumptions visible.

System inputs

Plan channels and outputs

Enter the real controller port limits from its datasheet. The reserve applies to pixels and their data slots.

Planning result

Control capacity estimate

Network data estimate

8

DMX universes for 1,200 planned pixels, including 200 reserve pixels

Data slots
3,600
Whole pixels / universe
170
Physical output ports
2
Physical controllers
1
Controller utilization
25%
Unused pixel capacity
3,600

Calculation basis

universes = ceil(planned pixels × slots per pixel ÷ 512)

  • • One DMX universe carries 512 data slots; RGB uses 3 slots and RGBW uses 4.
  • • Universes describe network data slots; they are not the same as physical controller outputs.
  • • Port/controller counts and utilization use your entered hardware limits, not an assumed Pileds model.
  • • Pixel IC timing, protocol overhead, frame rate, receiver topology, cable distance, firmware, and power are separate checks.

Shareable planning summary

Pileds controller-capacity planning summary
Project input: 1,000 physical RGB pixels with 20% reserve.
Planned load: 1,200 pixels including 200 reserve pixels.
Network data: 3,600 slots across 8 DMX universes.
Physical outputs: 2 ports across 1 controller, using 600 pixels/port and 8 ports/controller.
Selected-controller utilization: 25%.
Unused selected-controller capacity: 3,600 pixels.
Engineering confirmation is still required for pixel IC, protocol, frame rate, receiver topology, cable distance, firmware, and power design.

Verify the control designView controllers
Technical basis

A DMX universe is not a physical controller output

The universe calculation follows ANSI E1.11 DMX512-A's maximum packet size. It describes how many 512-slot data packets the planned RGB or RGBW load needs. The separate port and controller estimates use the physical limits you enter, because usable output capacity varies by controller, pixel protocol, refresh rate, topology, and firmware.

Before commissioning, carry the selected controller assumptions into the pre-power-on checklist and verify them against the actual controller, receiver, and fixture datasheets.

Source: ESTA ANSI E1.11 DMX512-A. Confirm the current controller and receiver datasheets before system design.